EC2254 - LINEAR INTEGRATED CIRCUITS(Regulation 2008)Time: Three hours Maximum: 100 MarksAnswer ALL Questions
PART A - (10 × 2 = 20 Marks)1.What is an integrated circuit?
2. What is current mirror?
3. Give the schematic of op-amp based current to voltage converter.
4. Draw the circuit diagram of differentiator and give its output equation.
5. What is a VCO?
6. Draw the relation between the capture and lock ranges range in a PLL.
7. Define resolution of a data converter.
8. Give the advantages of integrating type ADC
.9. Draw the internal circuit for audio power amplifier.
10. What are the three different wave forms generated by ICL8038?PART B - (5 × 16 = 80 Marks)
11. (A) (i) Define CMRR. Draw the circuit of an op-amp differential amplifierand give the expression for CMRR. (8)
(Ii) Define Slew Rate. Explain the cause of slew rate and derive anexpression for Slew rate for an op-amp voltage follower. (8)
Or
(B) Briefly explain the various processes involved in fabricating monolithicIC which integrates bipolar transistor, diode, capacitor and resistor. (16)
12. (A) (i) Design a first order low-pass filter for cut-off frequency of 2 KHzand pass-band gain of 2 (8)
(Ii) Explain a positive clipper circuit using an op-amp and a diode withneat diagrams. (8)Or(B) (i) Design a circuit to implement 2 1 4 3 0 2 25th 1 273rd 0 545th 0 V V V V V - + =.(8)
(Ii) Draw and explain a simple op-amp differentiator. Mention itslimitations. Explain with a neat diagram how it can be overcome ina practical differentiator. Design an op-amp differentiator that willdifferentiate an input signal with maximum frequencyFmax = 100 Hz. (8)
13. (A) (i) With a neat diagram explain the variable transconductancetechnique in analog multiplier and give its output equation. (8)
(Ii) Briefly explain the working of voltage controlled oscillator. (8)
Or
(B) What are important building block of phase locked loop (PLL) explain itsWorking? (16)
14. (A) (i) Explain the working of R-2R ladder DAC. (8)
(Ii) Explain the working of success approximation ADC. (8)
Or
(B) (i) A dual slope ABC uses a 16-bit counter and a 4 MHz clock rate. Themaximum input voltage is +10 V. The maximum integrator outputshould be voltage-8V when the counter is recycled throughn 2 counts. The capacitor used in the integrator is F μ first 0th Find thevalue of resistor R of the integrator. (8)
(Ii) What is a sample and hold circuit? Briefly explain its constructionand application. (8)
15. (A) (i) How is voltage regulators classified? Explain a series voltageregulator. (8)(Ii) What is an Optocoupler? Briefly explain its characteristics. (8)Or
(B) With a neat circuit diagram and internal diagram explain the functionalworking of 555 timers in Astable mode. (16)
For more information contact us via Studentstrainer@gmail.com. Caring is sharing, show your caring to us by sharing our post in social sites and keep like us,,,
PART A - (10 × 2 = 20 Marks)1.What is an integrated circuit?
2. What is current mirror?
3. Give the schematic of op-amp based current to voltage converter.
4. Draw the circuit diagram of differentiator and give its output equation.
5. What is a VCO?
6. Draw the relation between the capture and lock ranges range in a PLL.
7. Define resolution of a data converter.
8. Give the advantages of integrating type ADC
.9. Draw the internal circuit for audio power amplifier.
10. What are the three different wave forms generated by ICL8038?PART B - (5 × 16 = 80 Marks)
11. (A) (i) Define CMRR. Draw the circuit of an op-amp differential amplifierand give the expression for CMRR. (8)
(Ii) Define Slew Rate. Explain the cause of slew rate and derive anexpression for Slew rate for an op-amp voltage follower. (8)
Or
(B) Briefly explain the various processes involved in fabricating monolithicIC which integrates bipolar transistor, diode, capacitor and resistor. (16)
12. (A) (i) Design a first order low-pass filter for cut-off frequency of 2 KHzand pass-band gain of 2 (8)
(Ii) Explain a positive clipper circuit using an op-amp and a diode withneat diagrams. (8)Or(B) (i) Design a circuit to implement 2 1 4 3 0 2 25th 1 273rd 0 545th 0 V V V V V - + =.(8)
(Ii) Draw and explain a simple op-amp differentiator. Mention itslimitations. Explain with a neat diagram how it can be overcome ina practical differentiator. Design an op-amp differentiator that willdifferentiate an input signal with maximum frequencyFmax = 100 Hz. (8)
13. (A) (i) With a neat diagram explain the variable transconductancetechnique in analog multiplier and give its output equation. (8)
(Ii) Briefly explain the working of voltage controlled oscillator. (8)
Or
(B) What are important building block of phase locked loop (PLL) explain itsWorking? (16)
14. (A) (i) Explain the working of R-2R ladder DAC. (8)
(Ii) Explain the working of success approximation ADC. (8)
Or
(B) (i) A dual slope ABC uses a 16-bit counter and a 4 MHz clock rate. Themaximum input voltage is +10 V. The maximum integrator outputshould be voltage-8V when the counter is recycled throughn 2 counts. The capacitor used in the integrator is F μ first 0th Find thevalue of resistor R of the integrator. (8)
(Ii) What is a sample and hold circuit? Briefly explain its constructionand application. (8)
15. (A) (i) How is voltage regulators classified? Explain a series voltageregulator. (8)(Ii) What is an Optocoupler? Briefly explain its characteristics. (8)Or
(B) With a neat circuit diagram and internal diagram explain the functionalworking of 555 timers in Astable mode. (16)
For more information contact us via Studentstrainer@gmail.com. Caring is sharing, show your caring to us by sharing our post in social sites and keep like us,,,
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