EC 9355 Digital VLSI syllabus download

EC9355 DIGITAL VLSI L T P C
3 0 0 3

UNIT I MOS TRANSISTOR PRINCIPLE 9
NMOS and PMOS transistors, Process parameters for MOS and CMOS, Electrical
properties of CMOS circuits and device modeling, Scaling principles and fundamental
limits, CMOS inverter scaling, propagation delays, Stick diagram, Layout diagrams

UNIT II COMBINATIONAL LOGIC CIRCUITS 9
Examples of Combinational Logic Design, Elmore’s constant, Pass transistor Logic,
Transmission gates, static and dynamic CMOS design, Power dissipation – Low
power design principles

UNIT III SEQUENTIAL LOGIC CIRCUITS 9
Static and Dynamic Latches and Registers, Timing issues, pipelines, clock strategies,
Memory architecture and memory control circuits, Low power memory circuits,
Synchronous and Asynchronous design

UNIT IV DESIGNING ARITHEMETIC BUILDING BLOCKS 9
Data path circuits, Architectures for ripple carry adders, carry look ahead adders,
High speed adders, accumulators, Multipliers, dividers, Barrel shifters, speed and
area tradeoff

UNIT V IMPLEMENTATION STRATEGIES 9
Full custom and Semi custom design, Standard cell design and cell libraries, FPGA
building block architectures, FPGA interconnect routing procedures.

TOTAL: 45 PERIODS

TEXT BOOKS
1 Jan Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated circuits: A
design perspective”. Second Edition, Prentice Hall of India, 2003.
2 M.J. Smith, “Application specific integrated circuits”, Addisson Wesley, 1997

REFERENCES
1 N.Weste, K.Eshraghian, “Principles of CMOS VLSI DESIGN”, second edition,
Addision Wesley 1993
2 R.Jacob Baker, Harry W.LI., David E.Boyee, “CMOS Circuit Design, Layout and
Simulation”, 2005 Prentice Hall of India
3 A.Pucknell, Kamran Eshraghian, “BASIC VLSI DESIGN”, Third edition, Prentice
Hall of India, 2007.

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